Constant esp_idf_hal::sys::INTERRUPT_CORE0_CPU_INT_ENABLE_REG
source · pub const INTERRUPT_CORE0_CPU_INT_ENABLE_REG: u32 = 1611407620; // 1_611_407_620u32pub const INTERRUPT_CORE0_CPU_INT_ENABLE_REG: u32 = 1611407620; // 1_611_407_620u32