Type Alias esp_idf_hal::sys::i2s_config_t

source ·
pub type i2s_config_t = i2s_driver_config_t;
Expand description

@brief I2S driver configuration parameters

Aliased Type§

struct i2s_config_t {
Show 19 fields pub mode: u32, pub sample_rate: u32, pub bits_per_sample: u32, pub channel_format: u32, pub communication_format: u32, pub intr_alloc_flags: i32, pub __bindgen_anon_1: i2s_driver_config_t__bindgen_ty_1, pub __bindgen_anon_2: i2s_driver_config_t__bindgen_ty_2, pub use_apll: bool, pub tx_desc_auto_clear: bool, pub fixed_mclk: i32, pub mclk_multiple: u32, pub bits_per_chan: u32, pub chan_mask: i32, pub total_chan: u32, pub left_align: bool, pub big_edin: bool, pub bit_order_msb: bool, pub skip_msk: bool,
}

Fields§

§mode: u32

< I2S work mode

§sample_rate: u32

< I2S sample rate

§bits_per_sample: u32

< I2S sample bits in one channel

§channel_format: u32

< I2S channel format.

§communication_format: u32

< I2S communication format

§intr_alloc_flags: i32

< Flags used to allocate the interrupt. One or multiple (ORred) ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info

§__bindgen_anon_1: i2s_driver_config_t__bindgen_ty_1§__bindgen_anon_2: i2s_driver_config_t__bindgen_ty_2§use_apll: bool

< I2S using APLL as main I2S clock, enable it to get accurate clock

§tx_desc_auto_clear: bool

< I2S auto clear tx descriptor if there is underflow condition (helps in avoiding noise in case of data unavailability)

§fixed_mclk: i32

< I2S using fixed MCLK output. If use_apll = true and fixed_mclk > 0, then the clock output for i2s is fixed and equal to the fixed_mclk value. If fixed_mclk set, mclk_multiple won’t take effect

§mclk_multiple: u32

< The multiple of I2S master clock(MCLK) to sample rate

§bits_per_chan: u32

< I2S total bits in one channel, only take effect when larger than ‘bits_per_sample’, default ‘0’ means equal to ‘bits_per_sample’

§chan_mask: i32

< I2S active channel bit mask, set value in i2s_channel_t to enable specific channel, the bit map of active channel can not exceed (0x1<<total_chan).

§total_chan: u32

< I2S Total number of channels. If it is smaller than the biggest active channel number, it will be set to this number automatically.

§left_align: bool

< Set to enable left alignment

§big_edin: bool

< Set to enable big endian

§bit_order_msb: bool

< Set to enable msb order

§skip_msk: bool

< Set to enable skip mask. If it is enabled, only the data of the enabled channels will be sent, otherwise all data stored in DMA TX buffer will be sent