Struct PdmRxClkConfig 

pub struct PdmRxClkConfig { /* private fields */ }

Pulse density modulation (PDM) mode receive clock configuration for the I2S peripheral.

Implementations

impl PdmRxClkConfig

pub fn from_sample_rate_hz(rate: u32) -> Self

Create a PDM clock configuration with the specified sample rate in Hz. This will set the clock source to PLL_F160M, the MCLK multiple to 256 times the sample rate, and the downsampling mode to 8 samples.

pub fn clk_src(self, clk_src: ClockSource) -> Self

Set the clock source on this PDM receive clock configuration.

pub fn mclk_multiple(self, mclk_multiple: MclkMultiple) -> Self

Set the MCLK multiple on this PDM receive clock configuration.

pub fn downsample_mode(self, downsample_mode: PdmDownsample) -> Self

Set the downsampling mode on this PDM receive clock configuration.

Trait Implementations

impl Clone for PdmRxClkConfig

fn clone(&self) -> PdmRxClkConfig

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Copy for PdmRxClkConfig

impl Debug for PdmRxClkConfig

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Eq for PdmRxClkConfig

impl PartialEq for PdmRxClkConfig

fn eq(&self, other: &PdmRxClkConfig) -> bool

Equality operator ==.

fn ne(&self, other: &Rhs) -> bool

Inequality operator !=.

impl StructuralPartialEq for PdmRxClkConfig